Stability and the Output Capacitor ESR in LDOs

ersaelectronics.com

A regulator that is stable on the bench can oscillate in production, and the most common reason is the output capacitor. Unlike switching converters, which are compensated internally, many LDOs rely on the equivalent series resistance, or ESR, of the output capacitor to provide a phase boost that stabilizes the control loop. Choose the wrong capacitor and the loop can ring, oscillate, or drift out of regulation. This article explains the stability theory behind LDOs, the ESR zero, why modern ceramic capacitors can destabilize older parts, and the compensation approaches used today.

  1. Why an LDO Needs Compensation

An LDO is a feedback loop: the output is sensed, compared to a reference, amplified, and used to drive the pass element. Any feedback loop with gain must have enough phase margin to remain stable rather than ringing or oscillating. The internal error amplifier and the output stage introduce poles, and the output capacitor and its ESR add more. If the total phase lag at the frequency where the loop gain crosses unity reaches 360 degrees, the loop turns into an oscillator. Phase margin, the number of degrees by which the phase lag stays short of that point, is the figure of merit; a comfortable design targets on the order of 45 to 60 degrees.

  1. The Poles and the ESR Zero

The loop of a typical LDO contains two internal poles plus one pole set externally by the output capacitor. The output capacitor forms a pole with the output resistance of the regulator, which tends to roll off the loop gain and add phase lag. The capacitor's ESR, however, creates a zero. At frequencies above the point set by the capacitance and its ESR, the capacitor's impedance stops falling and flattens to the value of the ESR, effectively adding phase lead. This ESR zero is a deliberate stabilizing element: it injects phase boost right where the loop needs it, keeping the phase margin healthy. The catch is that the zero only lands in the useful frequency band if the ESR is neither too high nor too low.

  1. The ESR Window

Traditional LDOs therefore specify a range of allowed output-capacitor ESR, often from roughly 10 milliohms to a few ohms. Inside that window, the ESR zero sits where it helps. If the ESR is too high, the zero moves to low frequency, the loop becomes sluggish and may oscillate. If the ESR is too low, the zero moves to high frequency, out of the band where it is needed, and the loop can become unstable or ring on transients. This is the root of the classic ceramic-capacitor problem.

  1. Why Ceramic Capacitors Can Cause Trouble

Modern multilayer ceramic capacitors have very low ESR, often well under 10 milliohms. On an older LDO designed to need the ESR zero, such a capacitor pushes the stabilizing zero to a very high frequency where it does the loop no good, leaving insufficient phase margin. The symptom is usually high-frequency oscillation on the output, audible noise, or excessive ringing after a load transient, even though the DC output looks fine. The fix historically was to use a capacitor with a controlled ESR, such as a tantalum or aluminum-polymer part, or to add a small resistor in series with the ceramic. This is why datasheets from that era give detailed ESR ranges and warn against straight ceramics.

  1. Modern Compensation Approaches

Designers responded by eliminating the dependence on external ESR. Several internal approaches are common:

  • Internal compensation adds an internal zero-pair network inside the die, so the loop remains stable regardless of the output capacitor's ESR.
  • Feedforward compensation uses a small feedforward capacitor around the feedback divider to inject phase lead.
  • Very-low-ESR-stable parts are specified specifically to work with ceramic capacitors over a wide range, typically 1 uF to 22 uF.
  • Some parts are stable with no output capacitor at all, though at the cost of transient performance.

The result is that most contemporary LDOs are designed for ceramic capacitors and no longer impose an ESR window, but older parts and high-current parts still do, and the datasheet must be checked.

  1. Practical Stability Checks

To avoid stability problems in a design:

  • Read the recommended output-capacitor range and any ESR window on the datasheet, and stay inside it across temperature and tolerance.
  • Check the capacitor's ESR over the temperature range, because ceramic ESR rises at cold temperature and can move in or out of the window.
  • Verify the dielectric and value, because ceramic capacitance drops with DC bias; a 10 uF rated capacitor may act like 3 uF at operating voltage.
  • Examine the output on an oscilloscope during a load transient; clean recovery without ringing is the practical sign of adequate margin.
  • If oscillation appears, move within the allowed ESR range rather than changing the capacitor value blindly.

Summary

  • An LDO is a feedback loop that needs enough phase margin, typically 45 to 60 degrees, to avoid oscillation.
  • The output capacitor's ESR creates a stabilizing zero; too high or too low an ESR moves that zero out of the useful band.
  • Very-low-ESR ceramic capacitors can destabilize older LDOs that were designed to rely on a minimum ESR.
  • Modern internally compensated or ESR-stable LDOs remove this dependence and work directly with ceramics.
  • Always follow the datasheet's recommended capacitor range and verify transient recovery on the bench.